Frequency Compensation Techniques for Low-Power Operational Amplifiers

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Log out of Readcube. Click on an option below to access. Log out of ReadCube. The proposed solution exploits only one Miller capacitor and a resistor in the compensation network. The straightness of the technique is used to design, using a standard CMOS 0. Volume 36 , Issue 7. The full text of this article hosted at iucr. If you do not receive an email within 10 minutes, your email address may not be registered, and you may need to create a new Wiley Online Library account. If the address matches an existing account you will receive an email with instructions to retrieve your username.

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Frequency Compensation Techniques for Low-Power Operational Amplifiers

An improved frequency Pole-zero tracking fre Analysis of multistage With an active-feedback mechanism, a high-speed block separates the low-frequency high-gain path and high-frequency signal path such that high gain and wide bandwidth can be achieved simultaneously in the AFFC amplifier. The gain stage in the active-feedback network also reduces the size of the compensation capacitors such that the overall chip area of the amplifier becomes smaller and the slew rate is improved.

Furthermore, the presence of a left-half-plane zero in the proposed AFFC topology improves the stability and settling behavior of the amplifier. Index Terms—Active feedback, active-capacitive-feedback network, amplifiers, frequency compensation, multistage amplifiers.

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The continuous decrease in the supply voltage, however, poses challenges and difficulties to the design of analog circuits in mixed-signal systems as the threshold voltage of the transistors does not scale down proportionally to the supply voltage. The operational amplifier, which acts as a fundamental block in most analog systems, is required to achieve high gain and large bandwidth simultaneously in low-voltage condition.

To achieve high gain, a conventional cascode amplifier, which increases the gain by stacking up transistors, is not suitable in low-voltage design as the cascode structure results in small voltage swings. Instead, a multistage amplifier is widely used to boost the gain by increasing the number of gain stages horizontally.

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However, all multistage amplifiers suffer from the closed-loop stability problem due to the presence of multiple poles. A frequency-compensation tech- Manuscript received July 25, ; revised October 22, Digital Object Identifier Different frequency-compensation topologies for multistage amplifiers have been reported [2]—[10].

Nested-Miller compensation NMC [2]—[5] is a well-known pole-splitting technique for compensating multistage amplifiers. However, as mentioned by Eschauzier et al. In particular, the bandwidth of a three-stage NMC amplifier is reduced to one quarter of that of a single-stage amplifier. This technique uses a feedforward stage to create a left-half-plane LHP zero to cancel the second nondominant pole and results in the bandwidth extension by pole-zero cancellation in the passband of the amplifier. Another problem of the NMC structure is the presence of a right-half-plane RHP zero, which requires a large output transconductance to ensure stability and, thus, makes the amplifier unsuitable for low-power design [6], [7].

In order to significantly increase the bandwidth of the multistage amplifier, other nonstandard NMC topologies such as embedded tracking compensation ETC [8] and damping-factor-control frequency compensation DFCFC [9], [10] have been developed to remove the capacitive nesting structure; therefore, the output capacitive load due to Miller capacitors is reduced. The ETC amplifier extends the bandwidth by using the pole-zero cancellation approach while the DFCFC amplifier improves the bandwidth by the pole-splitting method and uses a damping-factor-control block to ensure stability when the inner Miller capacitor is removed.

However, as all published compensation topologies use passive-capacitive-feedback networks, the bandwidth of the amplifier is still limited for high-speed applications in low-power condition. In order to further improve the bandwidth of the amplifier in low-power design, a novel active-feedback frequency-compensation AFFC technique [11] is presented in this paper. Restrictions apply. Basic structure of an AFFC amplifier. Comparison of bandwidth on different frequency-compensation topologies take NMC as the reference.

As a result, the physical dimension of the proposed amplifier is greatly reduced and both the bandwidth and transient responses are improved. In addition, a high-speed block directs the high-frequency signal to bypass the slow-response intermediate high-gain stages; therefore, the bandwidth of the AFFC amplifier can be further enhanced.

The comparison on the bandwidth of three-stage amplifiers using different pole-splitting compensation topologies driving a capacitive load of around pF, as shown in Fig. Moreover, the active-capacitive-feedback network generates an LHP zero to improve the phase margin and, thus, the stability of the amplifier. Furthermore, when considering the dc gain, dB gain is generally sufficient for most applications and can be provided by three-stage amplifiers.

Any extra gain stage simply increases the power consumption and complicates the frequency-compensation structures [3], [7]—[10]. Therefore, this paper will mainly focus on discussing AFFC for three-stage amplifiers as the performance of the three-stage amplifier is optimum for the tradeoffs between the dc gain dB , bandwidth, and power consumption in practical circuit implementations. This paper is organized as follows. Finally, conclusions are given in Section V.

Dominant Pole Compensation

The input block with is realized by a differential pair. The HGB the gain of consists of two gain stages cascaded together denoted as to boost up the dc gain of a three-stage amplifier.

Active-feedback frequency-compensation technique for low-power multistage amplifiers_图文_百度文库

The HSB and consists of a feedforward stage FFS with the gain of connected in series a feedback stage FBS with the gain of , realizing the active-capacwith a compensation capacitor itive-feedback network. The function of the HSB is to control the high-frequency operation of the amplifier, which implies that it determines the location and value of the nondominant complex poles and, thus, the bandwidth of the amplifier. At high frequencies, any output signal change will be sensed through the input resistance of the FBS such that the signal at Va is almost the same as the signal at Vo and is given as Va Vo at high frequencies 1 II.

Different design issues such as dimension conditions, gain-bandwidth product GBW , transient responses, and low-power design considerations are also discussed. The signal at Va will then be directed to the output of the input block and amplified by the positive gain of the FBS.

The amplified feedback signal at the output of the input block will then be feedforwarded to the output again, through the FFS, in order to Authorized licensed use limited to: Haiqing Zhang. As the negative feedback loop is established in the HSB, the stability of the high-frequency signal can be achieved. In addition, since the slow-response gain stages in the HGB are bypassed during the whole negative feedback action at high frequencies, the structure of the HGB does not affect the speed of the amplifier. A smaller can also be used due to the positive gain of the FBS.

As a result, a significant bandwidth enhancement of the AFFC amplifier is achieved. Previously, the structure of the FBS with the compensation capacitor is only used in the frequency compensation of twostage amplifiers as it is efficient for the gain-bandwidth [12], [13] and power-supply rejection ratio performance [14], [15]. The input resistance of the FBS and the compensation capacitor can also introduce an LHP zero to increase the phase margin of the amplifier.

However, this structure cannot be directly applied to a three-stage amplifier with an inverting output stage as the value of the nondominant complex poles cannot be controlled, and the three-stage amplifier will then become unstable as illustrated in Fig. As a result, the FFS structure of the HSB is very critical as it can guarantee the stability of the amplifier by properly controlling the value of the nondominant complex poles.

In addition, the structure of the active-capacitive-feedback network in the HSB not only removes the RHP zero by blocking the feedforward signal current, but also creates an LHP zero to boost the phase margin; therefore, it improves the stability and settling behavior of the amplifier. In the figure, as the transconductance, output resistance, and lumped output parasitic capacitance of the th gain stage, respectively.

In is the loading resistance, is the loading particular, is the compensation capacitor in the HGB. The following assumptions are made to simplify the transfer function without losing accuracy in order to provide a clearer insight to the proposed structure. The method most commonly used is called dominant-pole compensation , which is a form of lag compensation. It is an external compensation technique and is used for relatively low closed loop gain.

A pole placed at an appropriate low frequency in the open-loop response reduces the gain of the amplifier to one 0 dB for a frequency at or just below the location of the next highest frequency pole. The lowest frequency pole is called the dominant pole because it dominates the effect of all of the higher frequency poles.

Dominant-pole compensation can be implemented for general purpose operational amplifiers by adding an integrating capacitance to the stage that provides the bulk of the amplifier's gain. This capacitor creates a pole that is set at a frequency low enough to reduce the gain to one 0 dB at or just below the frequency where the pole next highest in frequency is located.

In addition, dominant-pole compensation allows control of overshoot and ringing in the amplifier step response , which can be a more demanding requirement than the simple need for stability. Thus, for compensation, introduce a dominant pole by adding an RC network in series with the Op-Amp as shown in the figure. Hence, the frequency response of a dominant pole compensated open loop Op-Amp circuit shows uniform gain roll off from f d and becomes 0 at f 1 as shown in the graph. The advantages of dominant pole compensation are: 1.

It is simple and effective. Noise immunity is improved since noise frequency components outside the bandwidth are eliminated. Though simple and effective, this kind of conservative dominant pole compensation has two drawbacks:. Often, the implementation of dominant-pole compensation results in the phenomenon of Pole splitting. This results in the lowest frequency pole of the uncompensated amplifier "moving" to an even lower frequency to become the dominant pole, and the higher-frequency pole of the uncompensated amplifier "moving" to a higher frequency.

To overcome these disadvantages, pole zero compensation is used. Some other compensation methods are: lead compensation, lead—lag compensation and feed-forward compensation.